Currently, CCD and CMOS-APS are the mainstream imaging detectors. The basic working principle of CCD is similar to the physical mechanism of metal-oxide-semiconductor (MOS) capacitor. CCD is consisted of MOS capacitors and its working process includes signal charge generation, storage, transmission and detection. CCD is a device which transfers and stores signal in the form of charge packet. Its outstanding feature is that CCD transfers charge signal, instead of voltage signal or current signal, which is different from other imaging devices. When CCD is employed, clock pulse changes the semiconductor potential, which dictates the storage and transfer of charges. As for CMOS-APS, its work mechanism is described in Chinese patent CN1774814.
The technical parameters of a typical visible light CCD imaging device are as follows.
Maximum pixel density10k × 10k(DALSA)Minimum pixel size  2.4 μm(e2V) can't be reduced.Well capacity1000 e−/μm2
The technical parameters of a typical CMOS-APS imaging device (The functions of CMOS-APS pixel unit include photoelectron collection, storage, amplification, reset, and address selection.) are as follows.
Maximum pixel4k × 4k(0.18 μm CMOS process,densityRaytheon etc.)Minimum pixel size  2.8 μm(0.25 CMOS process, Panasonic)hard to be reduced.Well capacity3000 e−/μm2
A general comparison of CCD and CMOS-APS
CCDCMOS-APSLeakage currentPerfect <1 nA/cm2Worse >50 nA/cm2Fill factorPerfect ~100%Worse <60%Process requirementHighGeneralYieldLowHighCompatible with CMOSNoYesProcess or not
The limitations of CCD and CMOS-APS:
Presently, CCD and CMOS-APS are widely used as imaging devices in scientific instruments and home imaging equipments, but they both have their shortcomings which cannot be resolved. Essentially, CCD is made of a large number of MOS capacitors in series, which can transfer charges directionally in parallel. Its limitations are as follows.    1) It is difficult to increase the imaging speed as CCD needs to transfer charges physically during imaging.    2) The yield is low. Because of the cascaded structure of MOS capacitors and the need of transferring charges, any failed MOS capacitor among a string of CCD pixel units can affect the transmission of charge and the following pixel units cannot work normally. It usually shows the black stripe, white bars or filament. Therefore, process requirement for CCD manufacturing is very high, which usually leads to the low yield and high production cost.    3) It is difficult to reduce the size of pixel unit further. To maintain the same signal to noise rate (SNR) during the charges' transmission, the scaling of the size of the pixel unit demands thinner oxide nitride (ON) and the quality of ON should not change. Therefore, the further scaling of the size of pixel unit is very difficult. In addition, the edge effect also limits the further scaling of the pixel unit.
All of the limitations mentioned above are the essential problems of CCD, which can't be resolved fundamentally. The process factors of CCD manufacturing have significant effects on CCD. CCD is manufactured in the silicon integrated circuits and the basic processes include cleaning, oxidation, diffusion, lithography, etch, implantation, LPCVD, plasma growth and the test for each process step. The process of CCD manufacturing is the combination of above single process in different numbers and orders. Oxidation is one of the key processes and the SiO2 film formed by oxidation has very important effects on CCD. The SiO2 film is used as 1) the protection and passivation film of CCD, 2) the gate dielectric and 3) isolated layer between polysilicon films. The SiO2 can prevent the short circuit between the top and bottom polysilicon. The oxide should have no pinholes and voids. CCD manufacturing usually uses an oxidization method with a recombination of wet oxygen and dry oxygen oxidization method. In CCD manufacturing technology, the gate dielectric is made of SiO2 film and Si3N4 film above SiO2. This is because the dielectric constant of Si3N4 is about twice that of SiO2, but the thermal expansion coefficient of Si3N4 is twice that of SiO2 which leads to the bad contact of Si3N4 and Si. The expansion coefficient of SiO2 is close to that of Si, so CCD uses SiO2/Si3N4 as dielectric. Nowadays scientists all over the world are studying the gate dielectric of MOSFETs. They try to use high dielectric constant material instead of SiO2. These materials include: IIIA and IIIB group metallic oxide, such as Al2O3, Y2O3 and La2O3; VIB group metallic oxide, such as HfO2, ZrO2, TiO2; stacked structure such as HfO2/SiO2 and ZrO2/SiO2.
Unlike CCD, the pixel unit of CMOS-APS is independent with each other. During the signal transmission it doesn't need to transfer the charge, as a consequence it overcomes the shortcomings of CCD fundamentally. But each pixel of CMOS-APS is made of one photosensitive diode and three or more transistors. This framework leads to the following questions. 1) high dark current: because CMOS-APS use one diode as the photosensitive device, the dark current is almost two order of magnitudes higher than that of CCD; (2) difficult to improve the equivalent quantum efficiency; (3) unlike CCD, the pixel of CMOS-APS has at least three transistors besides the photosensitive diode, the fill factor of CMOS-APS is less than 60%. The ideal imaging device should have the advantages of pixel unit of CCD and the framework of CMOS-APS, which is also the purpose of this invention.
The existing floating gate memory device is a MOS device with an additional gate added between channel and control gate, this gate is surrounded by oxide so it is called floating gate. There is a control gate over the floating gate and this structure refers to the Chinese patent CN1156337. Under a certain electric field, electrons can tunnel into the floating gate surrounded by dense oxide. The advance of floating gate memory is as follows. Embedding Ge nanocrystals in the high-k dielectric can enhance the reliability, reduce the write voltage and increase the program speed; additionally, it can also improve the storage characteristics; MIS structure is made with electron beam evaporation method, it includes Al control gate, Ge nanocrystals in Al2O3 and Al2O3 tunneling oxide layer. This MIS structure shows good electrical properties under 1 MHz C-V test. The flat-band shift is up to 0.96V and charge storage density is 4.17×1012 cm−2. The charge storage properties of Ge nanocrystals in Al2O3 vary with frequency, the flat-band shift and charge storage density decrease with the increasing frequency (refers to Chinese Journal of Functional Materials and Devices, vol. 02, 2007).